Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders

Erick Amador; Vincent Rezard; Renaud Pacalet

doi:10.1109/VLSISOC.2009.6041337

Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders

Erick Amador
, Vincent Rezard
, Renaud Pacalet

Eurecom
Infineon Technologies France S.A.S

Résultats de recherche: Le chapitre dans un livre, un rapport, une anthologie ou une collection › Contribution à une conférence › Revue par des pairs

Résumé

The decoding of LDPC codes using the turbo-decoding message-passing strategy is considered. This strategy can be used with different SISO message computation kernels. We analyze the suitability for VLSI implementation of various message computation algorithms in terms of implementation area, energy consumption and error-correcting performance. As one of the computation kernels, we introduce the recent Self-Corrected Min-Sum algorithm and show the advantages it brings from an energy efficiency perspective. We present comparisons among the studied kernels implemented in a 65nm CMOS process and use a test case from the codes defined in IEEE 802.11n to show differences in energy efficiency.

langue originale	Anglais
titre	Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009
Editeur	IEEE Computer Society
Pages	95-100
Nombre de pages	6
ISBN (imprimé)	9781457702365
Les DOIs	https://doi.org/10.1109/VLSISOC.2009.6041337
état	Publié - 1 janv. 2009
Evénement	17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009 - Florianopolis, Brésil Durée: 12 oct. 2009 → 14 oct. 2009

Série de publications

Nom	Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009

Une conférence

Une conférence	17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009
Pays/Territoire	Brésil
La ville	Florianopolis
période	12/10/09 → 14/10/09

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SDG 7 Énergie abordable et propre

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10.1109/VLSISOC.2009.6041337

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Amador, E., Rezard, V., & Pacalet, R. (2009). Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders. Dans Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009 (p. 95-100). Article 6041337 (Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009). IEEE Computer Society. https://doi.org/10.1109/VLSISOC.2009.6041337

Amador, Erick ; Rezard, Vincent ; Pacalet, Renaud. / Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders. Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009. IEEE Computer Society, 2009. p. 95-100 (Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009).

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title = "Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders",

abstract = "The decoding of LDPC codes using the turbo-decoding message-passing strategy is considered. This strategy can be used with different SISO message computation kernels. We analyze the suitability for VLSI implementation of various message computation algorithms in terms of implementation area, energy consumption and error-correcting performance. As one of the computation kernels, we introduce the recent Self-Corrected Min-Sum algorithm and show the advantages it brings from an energy efficiency perspective. We present comparisons among the studied kernels implemented in a 65nm CMOS process and use a test case from the codes defined in IEEE 802.11n to show differences in energy efficiency.",

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Amador, E, Rezard, V & Pacalet, R 2009, Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders. Dans Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009., 6041337, Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009, IEEE Computer Society, p. 95-100, 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianopolis, Brésil, 12/10/09. https://doi.org/10.1109/VLSISOC.2009.6041337

Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders. / Amador, Erick; Rezard, Vincent; Pacalet, Renaud.
Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009. IEEE Computer Society, 2009. p. 95-100 6041337 (Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009).

Résultats de recherche: Le chapitre dans un livre, un rapport, une anthologie ou une collection › Contribution à une conférence › Revue par des pairs

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Amador E, Rezard V, Pacalet R. Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders. Dans Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009. IEEE Computer Society. 2009. p. 95-100. 6041337. (Proceedings - 17th IFIP International Conference on Very Large Scale Integration, VLSI-SoC 2009). doi: 10.1109/VLSISOC.2009.6041337

Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders

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SDG des Nations Unies

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