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Extracting logical formulae that capture the functionality of systemC designs

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Résumé

Object-oriented hardware design languages like SystemC have become very popular to co-design hardware and software systems. Such designs are classically translated into a transition system in order to verify a specification with model-checkers. However, compositionnality and parametricity of SystemC components complicate their translations into finite transition systems. Processing analysis of high-level designs occurs early in the design flow and aims to greatly reduce the correction costs of eventual errors. In this paper, we propose a formal method to statically analyze SystemC designs. Our approach consists in extracting a logical formula representing the behavior of the system in order to avoid combinatorial explosion. This method combines a symbolic execution of SystemC code to infer logical formulae representing its behavior and a generalization phase of these inferred logical properties.

langue originaleAnglais
titreIMECS 2011 - International MultiConference of Engineers and Computer Scientists 2011
Pages1055-1061
Nombre de pages7
étatPublié - 26 juil. 2011
Modification externeOui
EvénementInternational MultiConference of Engineers and Computer Scientists 2011, IMECS 2011 - Kowloon, Hong-Kong
Durée: 16 mars 201118 mars 2011

Série de publications

NomIMECS 2011 - International MultiConference of Engineers and Computer Scientists 2011
Volume2

Une conférence

Une conférenceInternational MultiConference of Engineers and Computer Scientists 2011, IMECS 2011
Pays/TerritoireHong-Kong
La villeKowloon
période16/03/1118/03/11

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