TY - GEN
T1 - FPGA PROTOTYPING OF AN IN-SITU RECONFIGURABLE FILTER BANK FOR AUDIO CODING
AU - Naviner, Lirida A.De B.
AU - Naviner, Jean François
AU - De Barros, Marcelo A.
N1 - Publisher Copyright:
© 2004 IEEE.
PY - 2003/1/1
Y1 - 2003/1/1
N2 - This paper presents the FPGA implementation of a processor suitable for adaptive multi-resolution analysis in a audio coding schema. Implementation takes into account all symmetries in the filter response and uses distributed arithmetic approach in order to reduce the device cells account and routing requirements. The prototyped circuit allows dynamic reconfiguration of subbands number and width.
AB - This paper presents the FPGA implementation of a processor suitable for adaptive multi-resolution analysis in a audio coding schema. Implementation takes into account all symmetries in the filter response and uses distributed arithmetic approach in order to reduce the device cells account and routing requirements. The prototyped circuit allows dynamic reconfiguration of subbands number and width.
U2 - 10.1109/mwscas.2003.1562419
DO - 10.1109/mwscas.2003.1562419
M3 - Conference contribution
AN - SCOPUS:85150457806
T3 - Midwest Symposium on Circuits and Systems
SP - 847
EP - 850
BT - Midwest Symposium on Circuits and Systems
A2 - Hamdy, Nadder
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 46th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2003
Y2 - 27 December 2003 through 30 December 2003
ER -