TY - GEN
T1 - HARDROC, readout chip of the Digital Hadronic Calorimeter of ILC
AU - Callier, S.
AU - Dulucq, F.
AU - De La Taille, C.
AU - Martin-Chassard, G.
AU - Seguin-Moreau, N.
PY - 2009/12/1
Y1 - 2009/12/1
N2 - HARDROC (HAdronic Rpc Detector ReadOut Chip) [1] is the very front end chip designed for the readout of the RPC or Micromegas foreseen for the Digital HAdronic CALorimeter (DHCAL) of the future International Linear Collider. The very fine granularity of the ILC hadronic calorimeters (1cm2 pads) implies a huge number of electronics channels (4 105/m3) which is a new feature of "imaging" calorimetry. Moreover, for compactness, the chips must be embedded inside the detector making crucial the reduction of the power consumption to 10 μW per channel. This is achieved using power pulsing, made possible by the ILC bunch pattern (1 ms of data acquisition for 199 ms of dead time). HARDROC readout is a semi-digital readout with three thresholds which allows both good tracking and coarse energy measurement, and also integrates on chip data storage. The overall performance of HARDROC will be described with detailed measurements of all the characteristics. Hundreds of chips have indeed been produced and tested before being mounted on printed boards developed for the readout of large scale (1m2) RPC and Micromegas prototypes. These prototypes have been tested with cosmics and also in testbeam at CERN in 2008 and 2009 to evaluate the performance of different kinds of GRPCs and to validate the semi-digital electronics readout system in beam conditions.
AB - HARDROC (HAdronic Rpc Detector ReadOut Chip) [1] is the very front end chip designed for the readout of the RPC or Micromegas foreseen for the Digital HAdronic CALorimeter (DHCAL) of the future International Linear Collider. The very fine granularity of the ILC hadronic calorimeters (1cm2 pads) implies a huge number of electronics channels (4 105/m3) which is a new feature of "imaging" calorimetry. Moreover, for compactness, the chips must be embedded inside the detector making crucial the reduction of the power consumption to 10 μW per channel. This is achieved using power pulsing, made possible by the ILC bunch pattern (1 ms of data acquisition for 199 ms of dead time). HARDROC readout is a semi-digital readout with three thresholds which allows both good tracking and coarse energy measurement, and also integrates on chip data storage. The overall performance of HARDROC will be described with detailed measurements of all the characteristics. Hundreds of chips have indeed been produced and tested before being mounted on printed boards developed for the readout of large scale (1m2) RPC and Micromegas prototypes. These prototypes have been tested with cosmics and also in testbeam at CERN in 2008 and 2009 to evaluate the performance of different kinds of GRPCs and to validate the semi-digital electronics readout system in beam conditions.
UR - https://www.scopus.com/pages/publications/84884175664
M3 - Conference contribution
AN - SCOPUS:84884175664
SN - 9789290833352
T3 - Proceedings of the Topical Workshop on Electronics for Particle Physics, TWEPP 2009
SP - 122
EP - 126
BT - Proceedings of the Topical Workshop on Electronics for Particle Physics, TWEPP 2009
T2 - Topical Workshop on Electronics for Particle Physics, TWEPP 2009
Y2 - 21 September 2009 through 25 September 2009
ER -