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Machine Learning for Security: The Case of Side-Channel Attack Detection at Run-time

  • Maria Mushtaq
  • , Ayaz Akram
  • , Muhammad Khurram Bhatti
  • , Maham Chaudhry
  • , Muneeb Yousaf
  • , Umer Farooq
  • , Vianney Lapotre
  • , Guy Gogniat
  • IRDL
  • University of California, Davis
  • Information Technology University
  • Dhofar University

Résultats de recherche: Le chapitre dans un livre, un rapport, une anthologie ou une collectionContribution à une conférenceRevue par des pairs

Résumé

This paper presents experimental evaluation and comparative analysis on the use of various Machine Learning (ML) models for detecting Cache-based Side Channel Attacks (CSCAs) in Intel's x86 architecture. The paper provides performance evaluation of ML models based on run-time detection accuracy, speed, computational overhead, and distribution of error in terms of false positives and false negatives. Experiments are performed using state-of-the-art CSCAs namely; Flush+Reload and Flush+Flush attacks, under realistic load conditions on RSA and AES crypto-systems. The paper provides quantitative qualitative analysis of at least 12 ML models being used for CSCA detection for the first time.

langue originaleAnglais
titre2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
EditeurInstitute of Electrical and Electronics Engineers Inc.
Pages485-488
Nombre de pages4
ISBN (Electronique)9781538695623
Les DOIs
étatPublié - 2 juil. 2018
Modification externeOui
Evénement25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 - Bordeaux, France
Durée: 9 déc. 201812 déc. 2018

Série de publications

Nom2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018

Une conférence

Une conférence25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
Pays/TerritoireFrance
La villeBordeaux
période9/12/1812/12/18

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