TY - GEN
T1 - Novel Self-Timing Speculative Writing for Unreliable STT-MRAM
AU - Zhang, Meng Di
AU - Cai, Hao
AU - Naviner, Lirida
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/11/3
Y1 - 2020/11/3
N2 - Considering the insatiable demand for emerging embedded non-volatile memory (NVM), spin-Transfer torque magnetic random access memory (STT-MRAM) can be configured with high access speed, readily hybrid integration and guaranteed endurance/retention, which becomes one of the most promising candidates among different types of NVM. However, the major drawback of STT-MRAM is that high switching energy is required, accompanied with unreliable writing operation. In this work, we propose a speculative MRAM writing scheme using self-Timing implementation, including speculative/ deterministic write operation and a judgment mechanism. Simulation results show that the speculative scheme can achieve 40% less writing power consumption and 50% less latency during write operation compared to standard writing method. The bit-error rate (BER) is maintained at 10-9 without inevitable cost.
AB - Considering the insatiable demand for emerging embedded non-volatile memory (NVM), spin-Transfer torque magnetic random access memory (STT-MRAM) can be configured with high access speed, readily hybrid integration and guaranteed endurance/retention, which becomes one of the most promising candidates among different types of NVM. However, the major drawback of STT-MRAM is that high switching energy is required, accompanied with unreliable writing operation. In this work, we propose a speculative MRAM writing scheme using self-Timing implementation, including speculative/ deterministic write operation and a judgment mechanism. Simulation results show that the speculative scheme can achieve 40% less writing power consumption and 50% less latency during write operation compared to standard writing method. The bit-error rate (BER) is maintained at 10-9 without inevitable cost.
UR - https://www.scopus.com/pages/publications/85099242951
U2 - 10.1109/ICSICT49897.2020.9278373
DO - 10.1109/ICSICT49897.2020.9278373
M3 - Conference contribution
AN - SCOPUS:85099242951
T3 - 2020 IEEE 15th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2020 - Proceedings
BT - 2020 IEEE 15th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2020 - Proceedings
A2 - Yu, Shaofeng
A2 - Zhu, Xiaona
A2 - Tang, Ting-Ao
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 15th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2020
Y2 - 3 November 2020 through 6 November 2020
ER -