Post-layout Security Evaluation Methodology Against Probing Attacks

Probing attack is considered to be one of the most powerful attack used to break the security and extract confidential information from an embedded system. This attack requires different bespoke equipment’s and expertise. However, for the moment, there is no methodology to evaluate theoretically the security level of a design or circuit against this threat. It can be only realized by a real evaluation of a certified evaluation laboratory. For the design house, this evaluation can be expensive in term of time and money. In this paper, we introduce an innovative methodology that can be applied to evaluate the probing attack on any design at simulation level. Our method helps to extract the sensitive signals of a design, emulate different Focused Ions Beam technologies used for probing attacks, and evaluate the accessibility level of each signal. It can be used to evaluate precisely any probing attack on the target design at simulation level, hence reducing the cost and time to market of the design. This methodology can be applied for both ASIC and FPGA technology. A use-case on an AES-128 shows the efficiency of our methodology. It also helps to evaluate the efficiency of the active shield used as a countermeasure against probing attack.