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Roadmap for Schottky barrier transistors

  • Eva Bestelink
  • , Giulio Galderisi
  • , Patryk Golec
  • , Yi Han
  • , Benjamin Iniguez
  • , Alexander Kloes
  • , Joachim Knoch
  • , Hiroyuki Matsui
  • , Thomas Mikolajick
  • , Kham M. Niang
  • , Benjamin Richstein
  • , Mike Schwarz
  • , Masiar Sistani
  • , Radu A. Sporea
  • , Jens Trommer
  • , Walter M. Weber
  • , Qing Tai Zhao
  • , Laurie E. Calvet
  • University of Surrey
  • Namlab
  • Research Centre Julich
  • Universitat Rovira i Virgili
  • Technische Hochschule Mittelhessen
  • RWTH Aachen University
  • Yamagata University
  • Technical University Dresden
  • University of Cambridge
  • Vienna University of Technology

Résultats de recherche: Contribution à un journalArticle de révisionRevue par des pairs

Résumé

In this roadmap we consider the status and challenges of technologies that use the properties of a rectifying metal-semiconductor interface, known as a Schottky barrier (SB), as an asset for device functionality. We discuss source gated transistors, which allow for excellent electronic characteristics for low power, low frequency environmentally friendly circuits. We also consider reconfigurable field effect transistors. In such devices, two or more independent gate electrodes can be used to program different functionalities at the device level, enabling ultra-secure embedded devices. Both types of transistors can be used for neuromorphic systems, notably by combining them with ferroelectric SB transistors which enable a large number of analog states. At cryogenic temperatures SB transistors can advantageously serve for the control electronics in quantum computing devices. If the source/drain of the metallic contact becomes superconducting, Josephson junctions with a tunable phase can be realized for scalable quantum computing applications. Developing applications using SB devices requires physics-based and compact models that can be used for circuit simulations, which are also discussed. The roadmap reveals that the main challenges for these technologies are improving processing, access to industrial technologies and modeling tools for circuit simulations.

langue originaleAnglais
Numéro d'article042001
journalNano Futures
Volume8
Numéro de publication4
Les DOIs
étatPublié - 1 déc. 2024

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