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SecBus: Operating system controlled hierarchical page-based memory bus protection

  • Su Lifeng
  • , Stephan Courcambeck
  • , Pierre Guillemin
  • , Christian Schwarz
  • , Renaud Pacalet
  • STMicroelectronics SA, France
  • CNRS LTCI

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Résumé

This paper presents a new two-levels page-based memory bus protection scheme. A trusted Operating System drives a hardware cryptographic unit and manages security contexts for each protected memory page. The hardware unit is located between the internal system bus and the memory controller. It protects the integrity and confidentiality of selected memory pages. For better acceptability the processor (CPU) architecture and the software application level are unmodified. The impact of the security on cost and performance is optimized by several algorithmic and hardware techniques and by a differentiated handling of memory pages, depending on their characteristics.

langue originaleAnglais
titreProceedings - 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09
Pages570-573
Nombre de pages4
étatPublié - 22 oct. 2009
Modification externeOui
Evénement2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09 - Nice, France
Durée: 20 avr. 200924 avr. 2009

Série de publications

NomProceedings -Design, Automation and Test in Europe, DATE
ISSN (imprimé)1530-1591

Une conférence

Une conférence2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09
Pays/TerritoireFrance
La villeNice
période20/04/0924/04/09

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