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Studying optimal spilling in the light of SSA

  • ENS Lyon

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7 Citations (Scopus)

Résumé

Recent developments in register allocation, mostly linked to static single assignment (SSA) form, have shown that it is possible to decouple the problem in two successive phases: a first spilling phase places load and store instructions so that the register pressure at all program points is small enough, a second assignment and coalescing phase maps the remaining variables to physical registers and reduces the number of move instructions among registers. This paper focuses on the first phase, for which many open questions remain: in particular, we study the notion of optimal spilling (what can be expressed?) and the impact of SSA form (does it help?). To identify the important features for optimal spilling on load-store architectures, we develop a new integer linear programming formulation, more accurate and expressive than previous approaches. Among other features, we can express SSA ø-functions, memory-to-memory copies, and the fact that a value can be stored simultaneously in a register and in memory. Based on this formulation, we present a thorough analysis of the results obtained for the SPECINT 2000 and EEMBC 1.1 benchmarks, from which we draw, among others, the following conclusions: a) rematerialization is extremely important, b) SSA complicates the formulation of optimal spilling, especially because of memory coalescing when the code is not in CSSA, c) micro-architectural fea- tures are significant and thus have to be accounted for, d) significant savings can be obtained in terms of static spill costs, cache miss rates, and dynamic instruction counts.

langue originaleAnglais
titreEmbedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11
Pages25-34
Nombre de pages10
Les DOIs
étatPublié - 21 nov. 2011
Modification externeOui
EvénementEmbedded Systems Week 2011, ESWEEK 2011 - 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11 - Taipei, Taiwan
Durée: 9 oct. 201114 oct. 2011

Série de publications

NomEmbedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11

Une conférence

Une conférenceEmbedded Systems Week 2011, ESWEEK 2011 - 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11
Pays/TerritoireTaiwan
La villeTaipei
période9/10/1114/10/11

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