TT-BIP: Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm

Hela Guesmi; Belgacem Ben Hedia; Simon Bliudze; Saddek Bensalem; Briag Le Nabec

doi:10.1007/978-3-319-66176-6_12

TT-BIP: Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm

Hela Guesmi
, Belgacem Ben Hedia
, Simon Bliudze
, Saddek Bensalem
, Briag Le Nabec

LIST-DTSI-SLA CEA
ENAC-IIC-GEL
Verimag

Résultats de recherche: Le chapitre dans un livre, un rapport, une anthologie ou une collection › Contribution à une conférence › Revue par des pairs

Résumé

In order to combine advantages of Real-Time Operating Systems (RTOS) implementing the Time-Triggered (TT) execution model and model-based design frameworks, we aim at proposing a correct-by-design methodology that derives correct TT implementations from high-level models. This methodology consists of two main steps; (1) transforming the high-level model into an intermediate which respects the TT communication principles and where all communication between components are simple send/receive interactions, and (2) transforming the obtained intermediate model into the programming language of the target platform. In this paper, we focus on the presentation of the methodology of the first step of the design flow. This methodology produces a correct-by-construction TT model by starting from a high-level model of the application software in Behaviour, Interaction, Priority (BIP).

langue originale	Anglais
titre	Verification and Evaluation of Computer and Communication Systems - 11th International Conference, VECoS 2017, Proceedings
rédacteurs en chef	Kamel Barkaoui, Hanifa Boucheneb, Ali Mili, Sofiene Tahar
Editeur	Springer Verlag
Pages	171-188
Nombre de pages	18
ISBN (imprimé)	9783319661759
Les DOIs	https://doi.org/10.1007/978-3-319-66176-6_12
état	Publié - 1 janv. 2017
Modification externe	Oui
Evénement	11th International Conference on Verification and Evaluation of Computer and Communication Systems, VECoS 2017 - Montreal, Canada Durée: 24 août 2017 → 25 août 2017

Série de publications

Nom	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	10466 LNCS
ISSN (imprimé)	0302-9743
ISSN (Electronique)	1611-3349

Une conférence

Une conférence	11th International Conference on Verification and Evaluation of Computer and Communication Systems, VECoS 2017
Pays/Territoire	Canada
La ville	Montreal
période	24/08/17 → 25/08/17

Accès au document

10.1007/978-3-319-66176-6_12

Contient cette citation

Guesmi, H., Ben Hedia, B., Bliudze, S., Bensalem, S., & Le Nabec, B. (2017). TT-BIP: Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm. Dans K. Barkaoui, H. Boucheneb, A. Mili, & S. Tahar (eds.), Verification and Evaluation of Computer and Communication Systems - 11th International Conference, VECoS 2017, Proceedings (p. 171-188). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol 10466 LNCS). Springer Verlag. https://doi.org/10.1007/978-3-319-66176-6_12

Guesmi, Hela ; Ben Hedia, Belgacem ; Bliudze, Simon et al. / TT-BIP : Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm. Verification and Evaluation of Computer and Communication Systems - 11th International Conference, VECoS 2017, Proceedings. Editeur / Kamel Barkaoui ; Hanifa Boucheneb ; Ali Mili ; Sofiene Tahar. Springer Verlag, 2017. p. 171-188 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

@inproceedings{c4c95611adcb403bb6fd9e25a6e47ae8,

title = "TT-BIP: Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm",

abstract = "In order to combine advantages of Real-Time Operating Systems (RTOS) implementing the Time-Triggered (TT) execution model and model-based design frameworks, we aim at proposing a correct-by-design methodology that derives correct TT implementations from high-level models. This methodology consists of two main steps; (1) transforming the high-level model into an intermediate which respects the TT communication principles and where all communication between components are simple send/receive interactions, and (2) transforming the obtained intermediate model into the programming language of the target platform. In this paper, we focus on the presentation of the methodology of the first step of the design flow. This methodology produces a correct-by-construction TT model by starting from a high-level model of the application software in Behaviour, Interaction, Priority (BIP).",

keywords = "Component-based design, Correct-by-design transformation, Formal methods, Model to model transformation, Time-triggered paradigm",

author = "Hela Guesmi and \{Ben Hedia\}, Belgacem and Simon Bliudze and Saddek Bensalem and \{Le Nabec\}, Briag",

note = "Publisher Copyright: {\textcopyright} 2017, Springer International Publishing AG.; 11th International Conference on Verification and Evaluation of Computer and Communication Systems, VECoS 2017 ; Conference date: 24-08-2017 Through 25-08-2017",

year = "2017",

month = jan,

day = "1",

doi = "10.1007/978-3-319-66176-6\_12",

language = "English",

isbn = "9783319661759",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

publisher = "Springer Verlag",

pages = "171--188",

editor = "Kamel Barkaoui and Hanifa Boucheneb and Ali Mili and Sofiene Tahar",

booktitle = "Verification and Evaluation of Computer and Communication Systems - 11th International Conference, VECoS 2017, Proceedings",

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Guesmi, H, Ben Hedia, B, Bliudze, S, Bensalem, S & Le Nabec, B 2017, TT-BIP: Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm. Dans K Barkaoui, H Boucheneb, A Mili & S Tahar (eds), Verification and Evaluation of Computer and Communication Systems - 11th International Conference, VECoS 2017, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOL. 10466 LNCS, Springer Verlag, p. 171-188, 11th International Conference on Verification and Evaluation of Computer and Communication Systems, VECoS 2017, Montreal, Canada, 24/08/17. https://doi.org/10.1007/978-3-319-66176-6_12

TT-BIP: Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm. / Guesmi, Hela; Ben Hedia, Belgacem; Bliudze, Simon et al.
Verification and Evaluation of Computer and Communication Systems - 11th International Conference, VECoS 2017, Proceedings. Ed. / Kamel Barkaoui; Hanifa Boucheneb; Ali Mili; Sofiene Tahar. Springer Verlag, 2017. p. 171-188 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol 10466 LNCS).

Résultats de recherche: Le chapitre dans un livre, un rapport, une anthologie ou une collection › Contribution à une conférence › Revue par des pairs

TY - GEN

T1 - TT-BIP

T2 - 11th International Conference on Verification and Evaluation of Computer and Communication Systems, VECoS 2017

AU - Guesmi, Hela

AU - Ben Hedia, Belgacem

AU - Bliudze, Simon

AU - Bensalem, Saddek

AU - Le Nabec, Briag

PY - 2017/1/1

Y1 - 2017/1/1

N2 - In order to combine advantages of Real-Time Operating Systems (RTOS) implementing the Time-Triggered (TT) execution model and model-based design frameworks, we aim at proposing a correct-by-design methodology that derives correct TT implementations from high-level models. This methodology consists of two main steps; (1) transforming the high-level model into an intermediate which respects the TT communication principles and where all communication between components are simple send/receive interactions, and (2) transforming the obtained intermediate model into the programming language of the target platform. In this paper, we focus on the presentation of the methodology of the first step of the design flow. This methodology produces a correct-by-construction TT model by starting from a high-level model of the application software in Behaviour, Interaction, Priority (BIP).

AB - In order to combine advantages of Real-Time Operating Systems (RTOS) implementing the Time-Triggered (TT) execution model and model-based design frameworks, we aim at proposing a correct-by-design methodology that derives correct TT implementations from high-level models. This methodology consists of two main steps; (1) transforming the high-level model into an intermediate which respects the TT communication principles and where all communication between components are simple send/receive interactions, and (2) transforming the obtained intermediate model into the programming language of the target platform. In this paper, we focus on the presentation of the methodology of the first step of the design flow. This methodology produces a correct-by-construction TT model by starting from a high-level model of the application software in Behaviour, Interaction, Priority (BIP).

KW - Component-based design

KW - Correct-by-design transformation

KW - Formal methods

KW - Model to model transformation

KW - Time-triggered paradigm

U2 - 10.1007/978-3-319-66176-6_12

DO - 10.1007/978-3-319-66176-6_12

M3 - Conference contribution

AN - SCOPUS:85028569918

SN - 9783319661759

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 171

EP - 188

BT - Verification and Evaluation of Computer and Communication Systems - 11th International Conference, VECoS 2017, Proceedings

A2 - Barkaoui, Kamel

A2 - Boucheneb, Hanifa

A2 - Mili, Ali

A2 - Tahar, Sofiene

PB - Springer Verlag

Y2 - 24 August 2017 through 25 August 2017

ER -

Guesmi H, Ben Hedia B, Bliudze S, Bensalem S, Le Nabec B. TT-BIP: Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm. Dans Barkaoui K, Boucheneb H, Mili A, Tahar S, rédacteurs en chef, Verification and Evaluation of Computer and Communication Systems - 11th International Conference, VECoS 2017, Proceedings. Springer Verlag. 2017. p. 171-188. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-319-66176-6_12

TT-BIP: Using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm

Résumé

Série de publications

Une conférence

Accès au document

Empreinte digitale

Contient cette citation