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Vade mecum on side-channels attacks and countermeasures for the designer and the evaluator

  • Sylvain Guilley
  • , Olivier Meynard
  • , Maxime Nassar
  • , Guillaume Duc
  • , Philippe Hoogvorst
  • , Houssem Maghrebi
  • , Aziz Elaabid
  • , Shivam Bhasin
  • , Youssef Souissi
  • , Nicolas Debande
  • , Laurent Sauvage
  • , Jean Luc Danger
  • CNRS LTCI

Résultats de recherche: Le chapitre dans un livre, un rapport, une anthologie ou une collectionContribution à une conférenceRevue par des pairs

3 Citations (Scopus)

Résumé

Implementation-level attacks are nowadays well known and most designers of security embedded systems are aware of them. However, both the number of vulnerabilities and of protections have seriously grown since the first public reporting of these threats in 1996. It is thus difficult to assess the correct countermeasures association to cover all the possible attack paths. The goal of this paper is to give a clear picture of the possible adequation between actually risks and mitigation techniques. A specific focus is made on two protection techniques addressing primarily side-channel attacks: masking and hiding. For the first time, we provide with a way to estimate a tradeoff depending on the environmental conditions (amount of noise) and on the designer skills (ability to balance the design). This tradeoff is illustrated in a decision diagram, helpful for the security designer to justify choices and to account for the cost overhead.

langue originaleAnglais
titre6th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS'11 - Technical Program
Les DOIs
étatPublié - 31 août 2011
Modification externeOui
Evénement6th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS'11 - Athens, Grcce
Durée: 6 avr. 20118 avr. 2011

Série de publications

Nom6th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS'11 - Technical Program

Une conférence

Une conférence6th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS'11
Pays/TerritoireGrcce
La villeAthens
période6/04/118/04/11

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