VLSI architecture for image geometrical transformations using an embedded core based processor

Carolina Miro; Nicolas Darbel; Renaud Pacalet; Valerie Paquet

VLSI architecture for image geometrical transformations using an embedded core based processor

Carolina Miro
, Nicolas Darbel
, Renaud Pacalet
, Valerie Paquet

Telecom Paris

Résultats de recherche: Contribution à une conférence › Papier › Revue par des pairs

Résumé

This paper presents a circuit dedicated to real time geometrical transforms of pictures. The supported transforms are third degree polynomials of two variables. The post-processing is performed by a bilinear filter. An embedded DSP core is in charge of high level, low rate, control tasks while a set of hard wired units is in charge of computing intensive low level tasks.

langue originale	Anglais
Pages	86-95
Nombre de pages	10
état	Publié - 1 janv. 1997
Evénement	Proceedings of the 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP'97 - Zurich, Switz Durée: 14 juil. 1997 → 16 juil. 1997

Une conférence

Une conférence	Proceedings of the 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP'97
La ville	Zurich, Switz
période	14/07/97 → 16/07/97

Contient cette citation

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title = "VLSI architecture for image geometrical transformations using an embedded core based processor",

abstract = "This paper presents a circuit dedicated to real time geometrical transforms of pictures. The supported transforms are third degree polynomials of two variables. The post-processing is performed by a bilinear filter. An embedded DSP core is in charge of high level, low rate, control tasks while a set of hard wired units is in charge of computing intensive low level tasks.",

author = "Carolina Miro and Nicolas Darbel and Renaud Pacalet and Valerie Paquet",

year = "1997",

month = jan,

day = "1",

language = "English",

pages = "86--95",

note = "Proceedings of the 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP'97 ; Conference date: 14-07-1997 Through 16-07-1997",

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VLSI architecture for image geometrical transformations using an embedded core based processor. / Miro, Carolina; Darbel, Nicolas; Pacalet, Renaud et al.
1997. 86-95 Papier présenté � Proceedings of the 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP'97, Zurich, Switz.

Résultats de recherche: Contribution à une conférence › Papier › Revue par des pairs

TY - CONF

T1 - VLSI architecture for image geometrical transformations using an embedded core based processor

AU - Miro, Carolina

AU - Darbel, Nicolas

AU - Pacalet, Renaud

AU - Paquet, Valerie

PY - 1997/1/1

Y1 - 1997/1/1

N2 - This paper presents a circuit dedicated to real time geometrical transforms of pictures. The supported transforms are third degree polynomials of two variables. The post-processing is performed by a bilinear filter. An embedded DSP core is in charge of high level, low rate, control tasks while a set of hard wired units is in charge of computing intensive low level tasks.

AB - This paper presents a circuit dedicated to real time geometrical transforms of pictures. The supported transforms are third degree polynomials of two variables. The post-processing is performed by a bilinear filter. An embedded DSP core is in charge of high level, low rate, control tasks while a set of hard wired units is in charge of computing intensive low level tasks.

M3 - Paper

AN - SCOPUS:0030689601

SP - 86

EP - 95

T2 - Proceedings of the 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP'97

Y2 - 14 July 1997 through 16 July 1997

ER -

VLSI architecture for image geometrical transformations using an embedded core based processor

Résumé

Une conférence

Empreinte digitale

Contient cette citation