TY - GEN
T1 - WoLFram - A word level framework for formal verification
AU - Sülflow, André
AU - Kühne, Ulrich
AU - Fey, Görschwin
AU - Große, Daniel
AU - Drechsler, Rolf
PY - 2009/11/16
Y1 - 2009/11/16
N2 - Due to high computational costs of formal verification on pure Boolean level, proof techniques on the word level, like Satisfiability Modulo Theories (SMT), were proposed. Verification methods originally based on Boolean satisfiability (SAT) can directly benefit from this progress. In this work we present the word level framework WoLFram that enables the development of applications for formal verification of systems independent of the underlying proof technique. The framework is partitioned into an application layer, a core engine and a back-end layer. A wide range of applications is implemented, e.g. equivalence and property checking including algorithms for coverage/property analysis, debugging and robustness checking. The backend supports Boolean as well as word level techniques, like SMT and Constraint Solving (CSP). This makes WoLFram a stable backbone for the development and quick evaluation of emerging verification techniques.
AB - Due to high computational costs of formal verification on pure Boolean level, proof techniques on the word level, like Satisfiability Modulo Theories (SMT), were proposed. Verification methods originally based on Boolean satisfiability (SAT) can directly benefit from this progress. In this work we present the word level framework WoLFram that enables the development of applications for formal verification of systems independent of the underlying proof technique. The framework is partitioned into an application layer, a core engine and a back-end layer. A wide range of applications is implemented, e.g. equivalence and property checking including algorithms for coverage/property analysis, debugging and robustness checking. The backend supports Boolean as well as word level techniques, like SMT and Constraint Solving (CSP). This makes WoLFram a stable backbone for the development and quick evaluation of emerging verification techniques.
UR - https://www.scopus.com/pages/publications/71049178754
U2 - 10.1109/RSP.2009.21
DO - 10.1109/RSP.2009.21
M3 - Conference contribution
AN - SCOPUS:71049178754
SN - 9780769536903
T3 - Proceedings of the International Workshop on Rapid System Prototyping
SP - 11
EP - 17
BT - Proceedings - 20th IEEE/IFIP International Symposium on Rapid System Prototyping
T2 - 20th IEEE/IFIP International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype, RSP 2009
Y2 - 23 June 2009 through 26 June 2009
ER -